The remote SUSE Linux SLES12 host has a package installed that is affected by multiple vulnerabilities as referenced in the SUSE-SU-2025:01650-1 advisory.

    Intel CPU Microcode was updated to the 20250512 release (bsc#1243123)

    - CVE-2024-28956: Exposure of Sensitive Information in Shared Microarchitectural Structures during     Transient Execution for some Intel Processors may allow an authenticated user to potentially enable     information disclosure via local access.
    - CVE-2025-20103: Insufficient resource pool in the core management mechanism for some Intel Processors     may allow an authenticated user to potentially enable denial of service via local access.
    - CVE-2025-20054: Uncaught exception in the core management mechanism for some Intel Processors may allow     an authenticated user to potentially enable denial of service via local access.
    - CVE-2024-43420: Exposure of sensitive information caused by shared microarchitectural predictor state     that influences transient execution for some Intel Atom processors may allow an authenticated user to     potentially enable information disclosure via local access.
    - CVE-2025-20623: Exposure of sensitive information caused by shared microarchitectural predictor state     that influences transient execution for some Intel Core processors (10th Generation) may allow an     authenticated user to potentially enable information disclosure via local access.
    - CVE-2024-45332: Exposure of sensitive information caused by shared microarchitectural predictor state     that influences transient execution in the indirect branch predictors for some Intel Processors may allow     an authenticated user to potentially enable information disclosure via local access.
    - CVE-2025-24495: Incorrect initialization of resource in the branch prediction unit for some Intel Core     Ultra Processors may allow an authenticated user to potentially enable information disclosure via local     access.
    - CVE-2025-20012: Incorrect behavior order for some Intel Core Ultra Processors may allow an     unauthenticated user to potentially enable information disclosure via physical access.
    - Updates for functional issues.

    - New Platforms

      | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products       |:---------------|:---------|:------------|:---------|:---------|:---------       | ARL-U          | A1       | 06-b5-00/80 |          | 0000000a | Core Ultra Processor (Series2)       | ARL-S/HX (8P)  | B0       | 06-c6-02/82 |          | 00000118 | Core Ultra Processor (Series2)       | ARL-H          | A1       | 06-c5-02/82 |          | 00000118 | Core Ultra Processor (Series2)       | GNR-AP/SP      | B0       | 06-ad-01/95 |          | 010003a2 | Xeon Scalable Gen6       | GNR-AP/SP      | H0       | 06-ad-01/20 |          | 0a0000d1 | Xeon Scalable Gen6       | LNL            | B0       | 06-bd-01/80 |          | 0000011f | Core Ultra 200 V Series Processor

    - Updated Platforms

      | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products       |:---------------|:---------|:------------|:---------|:---------|:---------       | ADL            | C0       | 06-97-02/07 | 00000038 | 0000003a | Core Gen12       | ADL            | H0       | 06-97-05/07 | 00000038 | 0000003a | Core Gen12       | ADL            | L0       | 06-9a-03/80 | 00000436 | 00000437 | Core Gen12       | ADL            | R0       | 06-9a-04/80 | 00000436 | 00000437 | Core Gen12       | ADL-N          | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200,     Atom x7211E/x7213E/x7425E       | AML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile       | AZB            | A0/R0    | 06-9a-04/40 | 00000009 | 0000000a | Intel(R) Atom(R) C1100       | CFL-H          | R0       | 06-9e-0d/22 | 00000102 | 00000104 | Core Gen9 Mobile       | CLX-SP         | B1       | 06-55-07/bf | 05003707 | 05003901 | Xeon Scalable Gen2       | CML-H          | R1       | 06-a5-02/20 | 000000fc | 00000100 | Core Gen10 Mobile       | CML-S102       | Q0       | 06-a5-05/22 | 000000fc | 00000100 | Core Gen10       | CML-S62        | G1       | 06-a5-03/22 | 000000fc | 00000100 | Core Gen10       | CML-U42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile       | CML-U62 V1     | A0       | 06-a6-00/80 | 000000fe | 00000102 | Core Gen10 Mobile       | CML-U62 V2     | K1       | 06-a6-01/80 | 000000fc | 00000100 | Core Gen10 Mobile       | CML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile       | CPX-SP         | A1       | 06-55-0b/bf | 07002904 | 07002b01 | Xeon Scalable Gen3       | EMR-SP         | A1       | 06-cf-02/87 | 21000291 | 210002a9 | Xeon Scalable Gen5       | GLK-R          | R0       | 06-7a-08/01 | 00000024 | 00000026 | Pentium J5040/N5030, Celeron     J4125/J4025/N4020/N4120       | ICL-D          | B0       | 06-6c-01/10 | 010002c0 | 010002d0 | Xeon D-17xx, D-27xx       | ICL-U/Y        | D1       | 06-7e-05/80 | 000000c6 | 000000ca | Core Gen10 Mobile       | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d0003f5 | 0d000404 | Xeon Scalable Gen3       | MTL            | C0       | 06-aa-04/e6 | 00000020 | 00000024 | Core Ultra Processor       | RKL-S          | B0       | 06-a7-01/02 | 00000063 | 00000064 | Core Gen11       | RPL-E/HX/S     | B0       | 06-b7-01/32 | 0000012c | 0000012f | Core Gen13/Gen14       | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004124 | 00004128 | Core Gen13       | RPL-HX/S       | C0       | 06-bf-02/07 | 00000038 | 0000003a | Core Gen13/Gen14       | RPL-S          | H0       | 06-bf-05/07 | 00000038 | 0000003a | Core Gen13/Gen14       | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004124 | 00004128 | Core Gen13       | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003e0 | 2c0003f7 | Xeon Max       | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4       | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4       | SRF-SP         | C0       | 06-af-03/01 | 03000330 | 03000341 | Xeon 6700-Series Processors with     E-Cores       | TGL            | B0/B1    | 06-8c-01/80 | 000000b8 | 000000bc | Core Gen11 Mobile       | TGL-H          | R0       | 06-8d-01/c2 | 00000052 | 00000056 | Core Gen11 Mobile       | TGL-R          | C0       | 06-8c-02/c2 | 00000038 | 0000003c | Core Gen11 Mobile       | TWL            | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200,     Atom x7211E/x7213E/x7425E       | WHL-U          | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen8 Mobile

Tenable has extracted the preceding description block directly from the SUSE security advisory.

Note that Nessus has not tested for these issues but has instead relied only on the application's self-reported version number.

The version of Tencent Linux installed on the remote TencentOS Server 4 host is prior to tested version. It is, therefore, affected by multiple vulnerabilities as referenced in the TSSA-2025:0368 advisory.

    Package updates are available for TencentOS Server 4 that fix the following vulnerabilities:

    CVE-2025-24495:
    Incorrect initialization of resource in the branch prediction unit for some Intel(R) Core Ultra     Processors may allow an authenticated user to potentially enable information disclosure via local access.

    CVE-2025-20623:
    Exposure of sensitive information caused by shared microarchitectural predictor state that influences     transient execution for some Intel(R) Core processors (10th Generation) may allow an authenticated user     to potentially enable information disclosure via local access.

    CVE-2025-20103:
    Insufficient resource pool in the core management mechanism for some Intel(R) Processors may allow an     authenticated user to potentially enable denial of service via local access.

    CVE-2025-20054:
    Uncaught exception in the core management mechanism for some Intel(R) Processors may allow an     authenticated user to potentially enable denial of service via local access.

    CVE-2025-20012:
    Incorrect behavior order for some Intel(R) Core Ultra Processors may allow an unauthenticated user to     potentially enable information disclosure via physical access.

    CVE-2024-45332:
    Exposure of sensitive information caused by shared microarchitectural predictor state that influences     transient execution in the indirect branch predictors for some Intel(R) Processors may allow an     authenticated user to potentially enable information disclosure via local access.

    CVE-2024-43420:
    Exposure of sensitive information caused by shared microarchitectural predictor state that influences     transient execution for some Intel Atom(R) processors may allow an authenticated user to potentially     enable information disclosure via local access.

    CVE-2024-28956:
    Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for     some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via     local access.

Tenable has extracted the preceding description block directly from the Tencent Linux security advisory.

Note that Nessus has not tested for these issues but has instead relied only on the application's self-reported version number.

The remote Debian 11 host has a package installed that is affected by multiple vulnerabilities as referenced in the dla-4170 advisory.

    -------------------------------------------------------------------------     Debian LTS Advisory DLA-4170-1                debian-lts@lists.debian.org     https://www.debian.org/lts/security/                         Tobias Frost     May 18, 2025                                  https://wiki.debian.org/LTS
    -------------------------------------------------------------------------

    Package        : intel-microcode     Version        : 3.20250512.1~deb11u1     CVE ID         : CVE-2024-28956 CVE-2024-43420 CVE-2024-45332 CVE-2025-20012                      CVE-2025-20054 CVE-2025-20103 CVE-2025-20623 CVE-2025-24495     Debian Bug     : 1105172

    Microcode updates has been released for Intel(R) processors, addressing     multiple potential vulnerabilties that may allow denial of service or     information disclosure.

    CVE-2024-28956

        Exposure of Sensitive Information in Shared Microarchitectural         Structures during Transient Execution for some Intel(R) Processors         may allow an authenticated user to potentially enable information         disclosure via local access.

    CVE-2024-43420

        Exposure of sensitive information caused by shared         microarchitectural predictor state that influences transient         execution for some Intel Atom(R) processors may allow an         authenticated user to potentially enable information disclosure via         local access.

    CVE-2024-45332

        Exposure of sensitive information caused by shared         microarchitectural predictor state that influences transient         execution in the indirect branch predictors for some Intel(R)         Processors may allow an authenticated user to potentially enable         information disclosure via local access.

    CVE-2025-20012

        Incorrect behavior order for some Intel(R) Core Ultra Processors         may allow an unauthenticated user to potentially enable information         disclosure via physical access.

    CVE-2025-20054

        Uncaught exception in the core management mechanism for some         Intel(R) Processors may allow an authenticated user to potentially         enable denial of service via local access.

    CVE-2025-20103

        Insufficient resource pool in the core management mechanism for some         Intel(R) Processors may allow an authenticated user to potentially         enable denial of service via local access.

    CVE-2025-20623

        Exposure of sensitive information caused by shared         microarchitectural predictor state that influences transient         execution for some Intel(R) Core processors (10th Generation) may         allow an authenticated user to potentially enable information         disclosure via local access.

    CVE-2025-24495

        Incorrect initialization of resource in the branch prediction unit         for some Intel(R) Core Ultra Processors may allow an authenticated         user to potentially enable information disclosure via local access.

    For Debian 11 bullseye, these problems have been fixed in version     3.20250512.1~deb11u1.

    We recommend that you upgrade your intel-microcode packages.

    For the detailed security status of intel-microcode please refer to     its security tracker page at:
    https://security-tracker.debian.org/tracker/intel-microcode

    Further information about Debian LTS security advisories, how to apply     these updates to your system and frequently asked questions can be     found at: https://wiki.debian.org/LTS     Attachment:
    signature.asc     Description: PGP signature

Tenable has extracted the preceding description block directly from the Debian security advisory.

Note that Nessus has not tested for these issues but has instead relied only on the application's self-reported version number.

The remote Debian 12 host has a package installed that is affected by multiple vulnerabilities as referenced in the dsa-5924 advisory.

    - -------------------------------------------------------------------------     Debian Security Advisory DSA-5924-1                   security@debian.org     https://www.debian.org/security/                     Salvatore Bonaccorso     May 23, 2025                          https://www.debian.org/security/faq
    - -------------------------------------------------------------------------

    Package        : intel-microcode     CVE ID         : CVE-2024-28956 CVE-2024-43420 CVE-2024-45332 CVE-2025-20012                      CVE-2025-20054 CVE-2025-20103 CVE-2025-20623 CVE-2025-24495     Debian Bug     : 1105172

    This update ships updated CPU microcode for some types of Intel CPUs. In     particular it provides mitigations for the Indirect Target Selection     (ITS) vulnerability (CVE-2024-28956) and the Branch Privilege Injection     vulnerability (CVE-2024-45332).

    For CPUs affected to ITS (Indirect Target Selection), to fully mitigate     the vulnerability it is also necessary to update the Linux kernel     packages released in a separate, forthcoming DSA.

    For details on the Indirect Target Selection (ITS) vulnerability please     refer to https://www.vusec.net/projects/training-solo/ and     https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-     guidance/indirect-target-selection.html .

    For details on the Branch Privilege Injection vulnerability please refer     to https://comsec.ethz.ch/research/microarch/branch-privilege-injection/

    For the stable distribution (bookworm), these problems have been fixed in     version 3.20250512.1~deb12u1.

    We recommend that you upgrade your intel-microcode packages.

    For the detailed security status of intel-microcode please refer to its     security tracker page at:
    https://security-tracker.debian.org/tracker/intel-microcode

    Further information about Debian Security Advisories, how to apply     these updates to your system and frequently asked questions can be     found at: https://www.debian.org/security/

    Mailing list: debian-security-announce@lists.debian.org

Tenable has extracted the preceding description block directly from the Debian security advisory.

Note that Nessus has not tested for these issues but has instead relied only on the application's self-reported version number.

It is, therefore, affected by multiple vulnerabilities as referenced in the ALAS2023-2025-991 advisory.

    A potential security vulnerability in some Intel(r) Processors may allow information disclosure. Intel is     releasing microcode updates and prescriptive guidance to mitigate this potential vulnerability.

    Info: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01153.html     (CVE-2024-28956)

    Potential security vulnerabilities in some Intel(r) Processor indirect branch predictors may allow     information disclosure. Intel is releasing microcode updates to mitigate these potential vulnerabilities.

    Advisory: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01247.html     (CVE-2024-45332)

    Potential security vulnerabilities in some Intel(r) Processors may allow denial of service. Intel is     releasing microcode updates to mitigate these potential vulnerabilities.

    Advisory: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01244.html     (CVE-2025-20054)

    Potential security vulnerabilities in some Intel(r) Processors may allow denial of service. Intel is     releasing microcode updates to mitigate these potential vulnerabilities.

    Advisory: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01244.html     (CVE-2025-20103)

Tenable has extracted the preceding description block directly from the tested product security advisory.

Note that Nessus has not tested for these issues but has instead relied only on the application's self-reported version number.

The remote Fedora 42 host has a package installed that is affected by multiple vulnerabilities as referenced in the FEDORA-2025-abf317121e advisory.

    - Update to upstream 2.1-49. 20250512
      - Addition of 06-ad-01/0x20 (GNR-AP/SP H0) microcode at revision         0xa0000d1;
      - Addition of 06-ad-01/0x95 (GNR-AP/SP B0) microcode at revision         0x10003a2;
      - Addition of 06-b5-00/0x80 (ARL-U A1) microcode at revision 0xa;
      - Addition of 06-bd-01/0x80 (LNL B0) microcode at revision 0x11f;
      - Addition of 06-c5-02/0x82 (ARL-H A1) microcode at revision 0x118;
      - Addition of 06-c6-02/0x82 (ARL-HX 8P/S B0) microcode (in         intel-ucode/06-c5-02) at revision 0x118;
      - Addition of 06-c6-04/0x82 microcode (in intel-ucode/06-c5-02) at         revision 0x118;
      - Addition of 06-ca-02/0x82 microcode (in intel-ucode/06-c5-02) at         revision 0x118;
      - Addition of 06-c5-02/0x82 (ARL-H A1) microcode (in         intel-ucode/06-c6-02) at revision 0x118;
      - Addition of 06-c6-02/0x82 (ARL-HX 8P/S B0) microcode at revision         0x118;
      - Addition of 06-c6-04/0x82 microcode (in intel-ucode/06-c6-02) at         revision 0x118;
      - Addition of 06-ca-02/0x82 microcode (in intel-ucode/06-c6-02) at         revision 0x118;
      - Removal of 06-55-06/0xbf (CLX-SP B0) microcode at revision 0x4003605;
      - Removal of 06-cf-01/0x87 (EMR-SP A0) microcode at revision 0x21000291;
      - Removal of 06-cf-02/0x87 (EMR-SP A1) microcode (in         intel-ucode/06-cf-01) at revision 0x21000291;
      - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision         0x5003707 up to 0x5003901;
      - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002904         up to 0x7002b01;
      - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0003f5         up to 0xd000404;
      - Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x10002c0         up to 0x10002d0;
      - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x24 up         to 0x26;
      - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xc6         up to 0xca;
      - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode from revision         0xb8 up to 0xbc;
      - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x38 up         to 0x3c;
      - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x52 up         to 0x56;
      - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)         microcode from revision 0xfc up to 0x100;
      - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in         intel-ucode/06-8f-07) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in         intel-ucode/06-8f-07) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in         intel-ucode/06-8f-07) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision         0x2b000620 up to 0x2b000639;
      - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in         intel-ucode/06-8f-07) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from         revision 0x2c0003e0 up to 0x2c0003f7;
      - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in         intel-ucode/06-8f-08) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in         intel-ucode/06-8f-08) from revision 0x2c0003e0 up to 0x2c0003f7;
      - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in         intel-ucode/06-8f-08) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from         revision 0x2c0003e0 up to 0x2c0003f7;
      - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in         intel-ucode/06-8f-08) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in         intel-ucode/06-8f-08) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision         0x2c0003e0 up to 0x2c0003f7;
      - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision         0x2b000620 up to 0x2b000639;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision         0x38 up to 0x3a;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in         intel-ucode/06-97-02) from revision 0x38 up to 0x3a;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)         from revision 0x38 up to 0x3a;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)         from revision 0x38 up to 0x3a;
      - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-97-02) from         revision 0x38 up to 0x3a;
      - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-97-02) from         revision 0x38 up to 0x3a;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in         intel-ucode/06-97-05) from revision 0x38 up to 0x3a;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x38         up to 0x3a;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)         from revision 0x38 up to 0x3a;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)         from revision 0x38 up to 0x3a;
      - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-97-05) from         revision 0x38 up to 0x3a;
      - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-97-05) from         revision 0x38 up to 0x3a;
      - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision         0x436 up to 0x437;
      - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in         intel-ucode/06-9a-03) from revision 0x436 up to 0x437;
      - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in         intel-ucode/06-9a-04) from revision 0x436 up to 0x437;
      - Update of 06-9a-04/0x40 (AZB A0) microcode from revision 0x9 up         to 0xa;
      - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x436         up to 0x437;
      - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision         0x102 up to 0x104;
      - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xfc up         to 0x100;
      - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xfc         up to 0x100;
      - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xfc         up to 0x100;
      - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xfe         up to 0x102;
      - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision         0xfc up to 0x100;
      - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x63 up         to 0x64;
      - Update of 06-aa-04/0xe6 (MTL-H/U C0) microcode from revision 0x20         up to 0x24;
      - Update of 06-af-03/0x01 (SRF-SP C0) microcode from revision 0x3000330         up to 0x3000341;
      - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x12c up         to 0x12f;
      - Update of 06-b7-04/0x32 microcode (in intel-ucode/06-b7-01) from         revision 0x12c up to 0x12f;
      - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision         0x4124 up to 0x4128;
      - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in         intel-ucode/06-ba-02) from revision 0x4124 up to 0x4128;
      - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-02) from         revision 0x4124 up to 0x4128;
      - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in         intel-ucode/06-ba-03) from revision 0x4124 up to 0x4128;
      - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4124         up to 0x4128;
      - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-03) from         revision 0x4124 up to 0x4128;
      - Update of 06-be-00/0x19 (ADL-N A0) microcode from revision 0x1c up         to 0x1d;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in         intel-ucode/06-bf-02) from revision 0x38 up to 0x3a;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in         intel-ucode/06-bf-02) from revision 0x38 up to 0x3a;
      - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x38 up         to 0x3a;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)         from revision 0x38 up to 0x3a;
      - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-bf-02) from         revision 0x38 up to 0x3a;
      - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-bf-02) from         revision 0x38 up to 0x3a;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in         intel-ucode/06-bf-05) from revision 0x38 up to 0x3a;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in         intel-ucode/06-bf-05) from revision 0x38 up to 0x3a;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)         from revision 0x38 up to 0x3a;
      - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x38 up         to 0x3a;
      - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-bf-05) from         revision 0x38 up to 0x3a;
      - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-bf-05) from         revision 0x38 up to 0x3a;
      - Update of 06-cf-01/0x87 (EMR-SP A0) microcode (in         intel-ucode/06-cf-02) from revision 0x21000291 up to 0x210002a9;
      - Update of 06-cf-02/0x87 (EMR-SP A1) microcode from revision 0x21000291         up to 0x210002a9.
      - Addresses CVE-2024-28956, CVE-2024-43420, CVE-2024-45332, CVE-2025-20012,         CVE-2025-20054, CVE-2025-20103, CVE-2025-20623, CVE-2025-24495


Tenable has extracted the preceding description block directly from the Fedora security advisory.

Note that Nessus has not tested for these issues but has instead relied only on the application's self-reported version number.

The version of microcode_ctl installed on the remote host is prior to 2.1-47. It is, therefore, affected by multiple vulnerabilities as referenced in the ALAS2-2025-2994 advisory.

    A potential security vulnerability in some Intel(r) Processors may allow information disclosure. Intel is     releasing microcode updates and prescriptive guidance to mitigate this potential vulnerability.

    Info: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01153.html     (CVE-2024-28956)

    Potential security vulnerabilities in some Intel(r) Processor indirect branch predictors may allow     information disclosure. Intel is releasing microcode updates to mitigate these potential vulnerabilities.

    Advisory: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01247.html     (CVE-2024-45332)

    Potential security vulnerabilities in some Intel(r) Processors may allow denial of service. Intel is     releasing microcode updates to mitigate these potential vulnerabilities.

    Advisory: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01244.html     (CVE-2025-20054)

    Potential security vulnerabilities in some Intel(r) Processors may allow denial of service. Intel is     releasing microcode updates to mitigate these potential vulnerabilities.

    Advisory: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01244.html     (CVE-2025-20103)

    Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R) Processors may     allow an authenticated user to potentially enable escalation of privilege via local access.
    (CVE-2025-20109)

Tenable has extracted the preceding description block directly from the tested product security advisory.

Note that Nessus has not tested for these issues but has instead relied only on the application's self-reported version number.

The Unity Linux 20 host has a package installed that is affected by a vulnerability as referenced in the UTSA-2026-015073 advisory.

    Uncaught exception in the core management mechanism for some Intel(R) Processors may allow an     authenticated user to potentially enable denial of service via local access.

Tenable has extracted the preceding description block directly from the Unity Linux security advisory.

Note that Nessus has not tested for this issue but has instead relied only on the application's self-reported version number.

The Rocky Linux 9.6 host has a package installed that is affected by multiple vulnerabilities as referenced in the CIQ ciqsa-2026_1569 advisory.

    This advisory aggregates security fixes for the microcode_ctl SRPM in CIQ LTS 9.6. It addresses 77 CVEs:
    CVE-2024-45332, CVE-2025-20623, CVE-2024-28047, CVE-2024-37020, CVE-2025-24495, and 72 more.

Tenable has extracted the preceding description block directly from the CIQ security advisory.

Note that Nessus has not tested for these issues but has instead relied only on the application's self-reported version number.

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available.

  - Uncaught exception in the core management mechanism for some Intel(R) Processors may allow an     authenticated user to potentially enable denial of service via local access. (CVE-2025-20054)

Note that Nessus relies on the presence of the package as reported by the vendor.

ID	名前	製品	ファミリー	公開日	更新日	深刻度
237165	SUSE SLES12 Security Update : ucode-intel (SUSE-SU-2025:01650-1)	Nessus	SuSE Local Security Checks	2025/5/23	2025/5/23	medium
275973	TencentOS Server 4: microcode_ctl (TSSA-2025:0368)	Nessus	Tencent Local Security Checks	2025/11/20	2025/11/20	medium
236930	Debian dla-4170 : intel-microcode - security update	Nessus	Debian Local Security Checks	2025/5/18	2025/5/18	medium
237206	Debian dsa-5924 : intel-microcode - security update	Nessus	Debian Local Security Checks	2025/5/23	2025/5/23	medium
237675	Amazon Linux 2023 : microcode_ctl (ALAS2023-2025-991)	Nessus	Amazon Linux Local Security Checks	2025/6/2	2025/6/2	medium
241300	Fedora 42 : microcode_ctl (2025-abf317121e)	Nessus	Fedora Local Security Checks	2025/7/3	2025/7/3	medium
265069	Amazon Linux 2 : microcode_ctl, --advisory ALAS2-2025-2994 (ALAS-2025-2994)	Nessus	Amazon Linux Local Security Checks	2025/9/16	2025/9/16	high
310887	Unity Linux 20.1050e / 20.1060e / 20.1070e Security Update: microcode_ctl (UTSA-2026-015073)	Nessus	Unity Linux Local Security Checks	2026/4/29	2026/4/29	medium
356446	Rocky Linux 9.6 [CIQ] Security Update: microcode_ctl Multiple Vulnerabilities (ciqsa-2026_1569)	Nessus	Rocky Linux Local Security Checks	2026/10/1	2026/10/13	high
250820	Linux Distros Unpatched Vulnerability : CVE-2025-20054	Nessus	Misc.	2025/8/18	2026/11/5	medium

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